SerDes Digital Design Engineer

Ad Astra Consultants

HK$48.7-73.1K[Monthly]
On-site - Central5-10 Yrs ExpBachelorFull-time
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This job is open to Singaporean/PR, Passholder - EP/SP/WP/Others, Foreigner(excluding Malaysia), Malaysian

Job Description

Benefits

  • Bonuses

    Stock Options/ESOP

  • Health & Wellness

    Health Insurance

  • Perks & Allowances

    Visa Sponsorship

  • Professional Development

    Career & Professional Development

  • Time Off & Leave

    Annual Leave, Childcare Leave, Sick Leave

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Description

  • Participate in high-level product specifications, microarchitecture and implementation of high-speed memory interfaces
  • Perform RTL coding, LINT checking and sanity testing on implemented designs
  • Work with the verification team for lab debugging
  • Work with the software team and/or customers to solve problems, debug and tune system performance

Requirements

  • Bachelor's degree in communications, electronic engineering or computer engineering, master’s degree preferred
  • More than 6 years (staff engineer) and 10 years (senior staff engineer) of ASIC design experience, familiar with ASIC development process
  • Good Verilog HDL coding skills and EDA tools such as synthesis and timing analysis
  • Familiarity with high-speed interfaces such as DDR, SerDes, PCIe is preferred
  • Ability to solve customer problems and deliver results in a timely manner
  • Strong organizational and communication skills where English is a must and Chinese is preferred
Circuit DesignCadenceHardware EngineeringPLC ProgrammingSerDesDDRPCIeVerilog HDLLINT
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M Ruban

Technical Recruitment ManagerAd Astra Consultants

Working Location

Vision Exchange. 2 Venture Dr, Singapore 608526

Posted on 14 October 2024

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